1. Field of the Invention
The present invention relates to a semiconductor device represented by a DRAM (Dynamic Random Access Memory), and to a manufacturing method thereof.
2. Description of the Related Art
In recent years, more downsizing and a higher integration of a semiconductor device have been tried for their attainment, and, therewith, individual device elements such as wiring etc have been increasingly made hyperfine. From such a trend, however, when forming, e.g., a contact hole, it becomes impossible to ensure a sufficient allowance in alignment between the contact hole and an electrode (a conductive part) of a lower layer due to the hyperfine structure. Hence, there has been adopted a method by which after the contact hole has been formed normally by a self-alignment or so formed as to have a large aperture, a side-wall is formed of an insulating layer within this contact hole, and the alignment allowance is taken by substantially reducing the contact hole.
Further, in the case of a DRAM as a semiconductor device, with a reduced cell area due to the hyperfine structure, as shown in FIG. 3(g), there has been adopted a so-called cylinder type electrode structure in which a capacitor electrode is formed upright enough to obtain a larger surface area.
For forming this cylinder type electrode structure, as illustrated in FIG. 3(a), a contact hole 2 is formed with an aperture within an inter-layer insulating layer 1, and thereafter polysilicon 3 is deposited inwardly of the contact hole 2 so that the contact hole 2 is filled with the polysilicon 3. Note that the reference numeral 8 designates a gate electrode, and 7 represents a silicon nitride layer. Subsequently, the polysilicon 3 is etched-back with the result that, as shown in FIG. 3(b), only the polysilicon 3a embedded into the contact hole 2 is left. Subsequently, the silicon oxide layer is deposited on the entire surface, and further this is subjected to patterning, thereby forming a recessed portion 4 for forming a cylinder as illustrated in FIG. 3(c).
Then, as shown in FIG. 3(d), side polysilicon 5 is deposited over the whole surface, and subsequently a silicon oxide layer is deposited thereon. Then, this silicon oxide layer is etched-back and thus left only in the recessed portion 4 as shown in FIG. 3(e).
Next, the polysilicon 5 is partially removed by etching it back, thereby forming a bottomed cylindrical polysilicon 5a as illustrated in FIG. 3(f). Thereafter, a silicon oxide layer 6 left in the recessed portion 4 and the silicon oxide layer forming the recessed portion 4 are removed by etching, thereby obtaining a cylinder type electrode structure shown in FIG. 3(g), i.e., a lower electrode structure of a cylinder type capacitor.
Incidentally, according to the cylinder type electrode structure, the side-wall 7 is formed in order to substantially reduce the contact hole 2. This side-wall 7, however, generally involves the use of a silicon nitride layer (SiN) exhibiting a high covering property even in a minute hole.
In the case of using the silicon nitride layer as the side-wall 7, however, as shown in FIG. 3(h), if a contact deviation occurs, it follows that the side-wall 7 comes into a direct contact with a gate electrode 8 and a field edge (unillustrated). Consequently, there arises such an inconvenience that a transistor characteristic fluctuates due to a stress in the silicon nitride layer, hydrogen in this layer and further an interface level etc, or that a junction leak current increases.
Moreover, in the DRAM having the above cylinder type electrode structure, the polysilicon 3a embedded into the contact hole 2 and the polysilicon 5a constituting a part of the cylinder portion are separately formed and hence microscopically discontinuous. Therefore, there might be a possibility in which the polysilicon 5a becoming a lower electrode of the cylinder type capacitor in the cylinder type electrode structure exfoliated from the contact composed of the polysilicon 3a embedded into the contact hole 2 when in, e.g., cleaning and spin-dry processes.
Furthermore, the manufacturing method of the above cylinder type electrode structure presents a drawback to be ameliorated, wherein the manufacturing process is complicated such as depositing the polysilicon twice.